The present invention relates, in general, to electrical circuits, and more particularly, to a novel electrical circuit having low static power dissipation and high output current.
In the past, a variety of circuit configurations have been utilized to provide complementary metal oxide semiconductor (CMOS) circuits which are capable of accepting transistor-transistor logic (TTL) voltage levels. The semiconductor industry has also combined CMOS with bipolar to form BICMOS circuits having TTL compatible inputs. One notable disadvantage of most, if not all, such prior circuits is the amount of power dissipated by the circuits' input stage. The voltage value of a TTL signal generally varies over a large range, and often drops to a level that is insufficient to disable the prior circuits' input transistors. When this occurs, excessive power is dissipated in the form of leakage current flowing through these input transistors.
In addition, the prior circuits generally have a small output current that limits the circuits' switching speed. In some cases, these prior circuits have utilized bipolar output transistors to provide increased output current. The bipolar output transistors generally consume power when the circuit is in a static (non-switching) condition, thus, resulting in high static power dissipation.
Accordingly, it is desirable to provide a circuit that has an input which operates with a TTL input signal, that has low static power dissipation, and that has a large output current.